Manuale d’uso / di manutenzione del prodotto 82801EB del fabbricante Intel
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Intel ® 82801EB (ICH5) I/O 82801ER (ICH5R), and 82801DB (ICH4) Controller Hub: AC ’97 PRM Programmers Reference Manual (P RM) April 2003 Docum ent Num ber: 252751-001 R.
R 2 AC ’ 97 Programmer’s Reference Manual INFORM ATION I N THIS DOCUM ENT IS PROVI DED IN CONNECTION WITH INTEL ® PRODUCTS. NO LICENSE, EXPRESS O R IM PLI ED, BY ESTOPPEL OR OTHERWISE, TO ANY I NTELL ECTUAL PROPERTY RI GHTS I S GRANTED BY THIS DOCUM ENT.
R AC ’ 97 Programmer’s Reference Manual 3 Contents 1 Introduction ................................................................................................................... ....... 7 1.1 About This Doc um ent .............................
R 4 AC ’ 97 Programmer’s Reference Manual 3.6.3.1 Determ ining the Presenc e of Secondar y and Tertiary Codecs................................................................................. 34 3.6.3.2 Determ ining the Presence of a Modem Function .
R AC ’ 97 Programmer’s Reference Manual 5 Figures Figure 1. Block Diagram of Platform Chips et with Intel ® ICH5 Component ...................... 13 Figure 2. Intel ® ICH5 AC ’97 Controller Connection to Its Com panion Codecs ................ 14 Figure 3.
R 6 AC ’ 97 Programmer’s Reference Manual Revision History Revision Number Description Revisi on Date -001 Initi al Release. April 2003.
Introduction R AC ’ 97 Programmer’s Reference Manual 7 1 Introduction 1.1 A bout This Document This docum ent w as prepared to ass ist In dependent Ha rdw are and Soft w are Vendors (IHVs and ISVs) in support ing the Int el ® I/O controller h ub (ICH5) A C ’97 cont roller feature s et.
Introduction R 8 AC ’ 97 Programmer’s Reference Manual Device Name Vendor ID Device ID Subsystem Vendor ID Subsystem Device ID Base Class Code Sub-Class Code Prog.
Introduction R AC ’ 97 Programmer’s Reference Manual 9 Device Name Vendor ID Device ID Subsystem Vendor ID Subsystem Device ID Base Class Code Sub-Class Code Prog.
Introduction R 10 AC ’ 97 Programmer’s Reference Manual This page is intentionally left blank..
Overv iew R AC ’ 97 Programmer’s Reference Manual 11 2 Overview In thi s docum ent , “ICH 5” stands for I/O C ontroller H ub 5. The ICH5 prov ides an A C ’ 97- compliant controller. Referen ces to the “A C ’97 Component Specification” ref er to the Audio Codec ’97 S pecification , Revision 2.
Overv iew R 12 AC ’ 97 Programmer’s Reference Manual Table 2. A udio Features Distribution Matrix A C ’97 A udio Controller Features Intel ® ICH Intel ® ICH2 Intel ® ICH3 Intel ® ICH4 Intel .
Overv iew R AC ’ 97 Programmer’s Reference Manual 13 Figure 1. Block Diagram o f Platform Chip set w ith Intel ® ICH5 Component Intel ® ICH5 USB 2.0 (Supports 6 USB ports) System Management (TCO) IDE-Pri mary GPIO SMBus 2.0/ I 2 C IDE-Secondary Power Management PCI Bus .
Overv iew R 14 AC ’ 97 Programmer’s Reference Manual Figure 2. Intel ® ICH5 A C ’97 Co ntroller Con nection t o Its Compan ion Codecs Intel ® IC H Digital Cont roller Prim ary Codec A C '97/AC '97 2.x/A MC '97 RESET# SDATA_OU T SYNC BIT_CLK SDATA_IN_ 2 SDATA_IN_ 1 SDATA_IN_ 0 A C '97/M C ' 97 2.
Overv iew R AC ’ 97 Programmer’s Reference Manual 15 2.1.2 Dedicated S/P DIF DMA Output Channel The ICH5 controller pro vides a dedicated DMA engine w ith the capability of outputtin g either PCM o r AC-3 d ata to the S/P D IF link fo r p ass-thro ugh to an exter nal CE audio de cod er.
Overv iew R 16 AC ’ 97 Programmer’s Reference Manual 2.1.5 Second Independent Input DM A Engines The ICH5 continues to provide two sets of input DMA eng ines that allow for the secondary or tertia.
Intel® ICH5 AC ’97 Controller Theory of Oper ation R AC ’ 97 Programmer’s Reference Manual 17 3 Intel ® ICH5 AC ’97 Controller Theory of Operation The ICH5 AC ’ 97 digital controller (DC ) interface is an implem entation of the A C-link, w ith additional featu res to support th e transaction and device pow er manag emen t.
Intel® ICH5 AC ’97 Controller Theory of Oper ation R 18 AC ’ 97 Programmer’s Reference Manual Drivers can distribute output and input data in appropriate slots associated with available codec(s).
Intel® ICH5 AC ’97 Controller Theory of Oper ation R AC ’ 97 Programmer’s Reference Manual 19 Table 4. M od em Registers Device 31 Function 6 Modem Offset Register Defaul t Comments 04h-05h Com.
Intel® ICH5 AC ’97 Controller Theory of Oper ation R 20 AC ’ 97 Programmer’s Reference Manual 3.2 DMA Engines The ICH5 AC ’ 97 controller uses a scatter ga ther m echanism to access mem ory. There are five, 16-bit D MA en gin es for A udio: 2 PCM Stereo In , 2 MIC m ono in, and S/P D IF Out .
Intel® ICH5 AC ’97 Controller Theory of Oper ation R AC ’ 97 Programmer’s Reference Manual 21 Table 6. BD Control and Length (DWORD 1: 04 -07h) Bit Description 31 Interrupt on Completion (IOC) 1= Enable , 0 = Dis able. W hen this it is set, it m eans t he controll er should is sue an int errupt upon com pleti on of this buffer.
Intel® ICH5 AC ’97 Controller Theory of Oper ation R 22 AC ’ 97 Programmer’s Reference Manual The following steps describe the driver initialization pro cess for a single DMA engine. The sam e process sh ould be repeated for each DMA eng ine. 1.
Intel® ICH5 AC ’97 Controller Theory of Oper ation R AC ’ 97 Programmer’s Reference Manual 23 Table 10. M od em Last Valid Ind ex Modem Last V alid Index (LVI ) I/O A ddress: Line IN MBAR + 05h (MILVI) Line OUT MBAR + 15h (MOLVI), 5.
Intel® ICH5 AC ’97 Controller Theory of Oper ation R 24 AC ’ 97 Programmer’s Reference Manual // Advance tail to next value tail++; } 3.2.4 Stopping Transfer s There are tw o w ays that DMA transfers can be s topped. 1. By sim p ly turn ing off the Bus Master run/pause bit.
Intel® ICH5 AC ’97 Controller Theory of Oper ation R AC ’ 97 Programmer’s Reference Manual 25 2. As a result of th e DMA engine reach ing the L ast Valid Index, no fu rther access to m emory, therefore FIFO w ill not drain.
Intel® ICH5 AC ’97 Controller Theory of Oper ation R 26 AC ’ 97 Programmer’s Reference Manual 3.4.3 FI FO Organizati on The ICH5 AC ’97 controller su pports 16-bit sam ples on all ch annels except PCM Out , w hich also support s 20-bi t sam ples.
Intel® ICH5 AC ’97 Controller Theory of Oper ation R AC ’ 97 Programmer’s Reference Manual 27 Figure 7. Incompatible Implementation of Sample Ra te Conversion with Repeating Slots over Next Fra.
Intel® ICH5 AC ’97 Controller Theory of Oper ation R 28 AC ’ 97 Programmer’s Reference Manual Table 12. SDM Reg ister Description Bit Ty pe Reset Description 7:6 RW 00 PCM In 2, Microphone I n .
Intel® ICH5 AC ’97 Controller Theory of Oper ation R AC ’ 97 Programmer’s Reference Manual 29 Shadow ing in mem ory is effectiv e as long as the codec itself does not chang e the value of the registers.
Intel® ICH5 AC ’97 Controller Theory of Oper ation R 30 AC ’ 97 Programmer’s Reference Manual 3.6 Pow er Management Power m anagemen t of th e driver/codec interaction requ ires careful sequen cing in the ICH5 A C ’97 environm ent.
Intel® ICH5 AC ’97 Controller Theory of Oper ation R AC ’ 97 Programmer’s Reference Manual 31 Conf igu ration 5 is a tw o-codec audio topology . In this con figuration concerns are on th e proper pow er down sequence. How ever, no driver in teraction is expected as only the audio driver execut es po wer management funct ions.
Intel® ICH5 AC ’97 Controller Theory of Oper ation R 32 AC ’ 97 Programmer’s Reference Manual • Mo de m D3 co nfigura tio n is de pe ndent on wake-up on ri ng event e nab le.
Intel® ICH5 AC ’97 Controller Theory of Oper ation R AC ’ 97 Programmer’s Reference Manual 33 Configurati on Numbers 3 to 6: Dual Funct ion Singl e or Dual Codec Configurati ons: Table 16. Po wer St ate M appin g for Audio in Dual Codec Deskt op T ransition PR<0:5> + (EAPD) +12 +5 from +12 +3.
Intel® ICH5 AC ’97 Controller Theory of Oper ation R 34 AC ’ 97 Programmer’s Reference Manual Table 17. Po wer St ate M apping for M odem in Dual Codec Deskto p Tran sition PR<A : D> + ML NK (other power control (PRx) bit s do not apply for Intel ® ICH5 implementation) +12 +5 from +12 +3.
Intel® ICH5 AC ’97 Controller Theory of Oper ation R AC ’ 97 Programmer’s Reference Manual 35 3.6.3.2 Determining the Presence of a Modem Function In the case of an AMC config uration, only the primary cod ec ready bit w ill b e indicated.
Intel® ICH5 AC ’97 Controller Theory of Oper ation R 36 AC ’ 97 Programmer’s Reference Manual 3.6.5.1 Primary Audio Request ed to D3 The audio pow er ma nagem ent procedure attemptin g to get th e audio codec to D3 state.
Intel® ICH5 AC ’97 Controller Theory of Oper ation R AC ’ 97 Programmer’s Reference Manual 37 3.6.5.4 A udio Primary Request ed to D0 The audio power m anagem ent procedure will attem pt to get the audio codec to D0 state.
Intel® ICH5 AC ’97 Controller Theory of Oper ation R 38 AC ’ 97 Programmer’s Reference Manual A pseudo code representation is as follows: void Link_reset(void) { If Cold_Reset# == True // AC_RE.
Surround Audio Support R AC ’ 97 Programmer’s Reference Manual 39 4 Surround Audio Support The AC ’97 Component Specification allow s for up to six channels of audio supported in the A C- link.
Surround Audio Support R 40 AC ’ 97 Programmer’s Reference Manual Table 20. Multiple Codec A udio Channel Distribution Split A udio Codec Configuration Primary Secondary T ertiary Total Channels L.
Surround Audio Support R AC ’ 97 Programmer’s Reference Manual 41 Table 22. AC-Link PCM 4/6 -Chann els Enable Bits PCM 4/ 6 Enable: Enables the PCM Output to be in 4 channel or 6-channel mode. PCM Slots Enable : (PCM OUT DMA) S/PDIF Slots Ena ble: (S/PDI F Out DM A ) 00 = 2 channel m ode (default).
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20-Bits PCM Support R AC ’ 97 Programmer’s Reference Manual 43 5 20-Bits PCM Support The ICH5 A C ’97 con troller prov ides su pport for 16- or 20-bit PCM out.
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Independent S-P/DIF Output Capability R AC ’ 97 Programmer’s Reference Manual 45 6 Independent S-P/DIF Output Capability The ICH5 AC ’97 controller provi des an in dependent DMA en gin e for S- P/DIF ou tput th at operates independently of the six ch annels PCM Out stream .
Independent S-P/DIF Output Capability R 46 AC ’ 97 Programmer’s Reference Manual This page is intentionally left blank..
Support for Double Rate Audio R AC ’ 97 Programmer’s Reference Manual 47 7 Support for Double Rate Audio The ICH5 AC’ 97 controller has the capability of supporting a s tereo 96 kHz st ream u sing the AC’ 97 Double Rate Audio (DRA ) support.
Support for Double Rate Audio R 48 AC ’ 97 Programmer’s Reference Manual This page is intentionally left blank..
Independent Input Channels Capability R AC ’ 97 Programmer’s Reference Manual 49 8 Independent Input Channels Capability ICH5 AC ’97 controller provides capability for tw o DMA channels dedicated to independent PCM and Microphon e audio stream s.
Independent Input Channels Capability R 50 AC ’ 97 Programmer’s Reference Manual Bit Descripti on 11 Reserved 3 Steer Enabl e (SE): W hen set, the S DATA_I N lines are t reated separat ely and not OR’d t ogether before being sent t o the DMA engines .
Intel® ICH5 AC ’ 97 Modem Driver R AC ’ 97 Programmer’s Reference Manual 51 9 Intel ® ICH5 AC ’97 Modem Driver The AC ’97 Component Specification allow s for a m odem codec to be connected to th e AC- link interface. This allow s for the developmen t of a softw are stack that provides modem fun ctionality, i.
Intel® ICH5 AC ’97 M odem Driver R 52 AC ’ 97 Programmer’s Reference Manual The first invocation of the h ost based modem task provides an initial buff e r and one or more buff ers of s purious data (h enceforth , spurious buff ers).
Intel® ICH5 AC ’ 97 Modem Driver R AC ’ 97 Programmer’s Reference Manual 53 while (tail <= Prefetched_Index) { tail++; // Happens IFF Spurious Data was used } if ( ((tail <= LastValidIndex) || (tail == free)) &&(((tail+1) <= LastValidIndex) || ((tail+1) == free)) ) { Descriptor.
Un punto importante, dopo l’acquisto del dispositivo (o anche prima di acquisto) è quello di leggere il manuale. Dobbiamo farlo per diversi motivi semplici:
Se non hai ancora comprato il Intel 82801EB è un buon momento per familiarizzare con i dati di base del prodotto. Prime consultare le pagine iniziali del manuale d’uso, che si trova al di sopra. Dovresti trovare lì i dati tecnici più importanti del Intel 82801EB - in questo modo è possibile verificare se l’apparecchio soddisfa le tue esigenze. Esplorando le pagine segenti del manuali d’uso Intel 82801EB imparerai tutte le caratteristiche del prodotto e le informazioni sul suo funzionamento. Le informazioni sul Intel 82801EB ti aiuteranno sicuramente a prendere una decisione relativa all’acquisto.
In una situazione in cui hai già il Intel 82801EB, ma non hai ancora letto il manuale d’uso, dovresti farlo per le ragioni sopra descritte. Saprai quindi se hai correttamente usato le funzioni disponibili, e se hai commesso errori che possono ridurre la durata di vita del Intel 82801EB.
Tuttavia, uno dei ruoli più importanti per l’utente svolti dal manuale d’uso è quello di aiutare a risolvere i problemi con il Intel 82801EB. Quasi sempre, ci troverai Troubleshooting, cioè i guasti più frequenti e malfunzionamenti del dispositivo Intel 82801EB insieme con le istruzioni su come risolverli. Anche se non si riesci a risolvere il problema, il manuale d’uso ti mostrerà il percorso di ulteriori procedimenti – il contatto con il centro servizio clienti o il servizio più vicino.
